NSF Convergence Accelerator Track I: Building a Sustainable, Innovative Ecosystem for Microchip Manufacturing

Microelectronics technology is the pervasive solution across functions ranging from communications and computation to sensing and imaging, for products ranging from washing machines to automobiles and mega-data centers. Transistor dimensional scaling has reduced energy consumption and increased speed and functionality, simultaneously. To maintain performance scaling: i) iterative technology change is insufficient, and ii) supply chain sustainability in terms of workforce quality, materials criticality, and manufacturing effluent has no inherent scaling vector. Economic risk for the nation has never been so large, and rarely been so dependent on a particular technology evolution. The end of transistor/chip scaling requires a new chip/package scaling paradigm. This research program will create a formal industry/government/academic infrastructure called the Microelectronics Manufacturing Sustainability Program (MMSP) for the microelectronics packaging supply chain that will deliver consensus policy recommendations, technology goals and timelines, as well as education and workforce development products in chip/package scaling; and will prototype a new massive-bandwidth chip package. MMSP will be led by six Convergence Teams (Technology, Workforce, Manufacturing, Supply Chain, Materials Criticality, Roadmap) to realize: (a) Innovative packaging prototypes for scaling microelectronics (b) an industry Technology Roadmap for materials, processing, design, and sustainability scaling (c) Grand Challenge sustainability studies of materials criticality, process effluent and cradle-to grave energy consumption in IC chips for information and automotive industries, and (d) Databases of materials properties, process tools, and workforce skills to guide packaging innovation. MMSP will: (i) inform industry R&D with innovative prototypes; (ii) embrace Diversity, Equity, Inclusion and Accessibility with education and training for human capital of the US microelectronics industry, using an agile continuous education methodology; (iii) create K-12 Science, Technology, Engineering and Mathematics awareness to support a critical pipeline for the next-generation of engineers and technicians; (iv) engage with Historically Black Colleges and Universities and Hispanic Serving Institutions; and (v) build diverse working groups for the creation of technology and education roadmaps. There will also be three major technical components to the proposed project. (1) Electronic-Photonic Packaging (EPP) Research: How will a $400B semiconductor industry supply chain transition from chip-scaling to a new package-scaling platform? Can teams of experts who bridge applications from pure electronics to photonics jointly create a common glossary, design infrastructure, and supply chain alignment? MMSP is driven by the Integrated Photonics Systems Roadmap-International (IPSR-I) Consortium: a forum to construct a common manufacturing platform and establish a learning curve to identify performance/cost benefits of research and development Grand Challenges. Global electronic/photonic industries have committed to construction of an EPP Roadmap for the microelectronics supply chain with sustainability metrics. Phase 1 research will include feasibility demonstration of innovative EPP designs for scaling package I/O to >1 Petabit/second data transfer rates. (2) Sustainability Attributes & Boundaries: Sustainability is the critical ‘small planet frontier’ for high volume manufacturing. Phase 1 white paper studies will guide EPP Roadmap tasks to assess how materials, workforce, life-cycle, and energy become supply chain limiting resources; the Roadmap releases will anticipate disruptions and specify trade-offs in engineering, economic, social, and policy constraints with research, design, and manufacturing Process-Based Cost Models. (3) Workforce Agile Continuous Education: Technology transitions introduce risks to: (i) firms’ business and sustainability propositions; (ii) worker careers; and (iii) incumbent technology compatibility. Converging Learning Science with Manufacturing Innovation will enable research discovery to translate into a new Design for Packaging/Test education program (Phase 1 outlines curriculum). MIT’s Lab for Education and Application Prototypes (LEAP) will train 2-year and 4-year college students and upskill incumbent workers by its extant blended instruction strategy: (a) Massive Open Online Courses (conceptual learning); (b) Virtual Reality sims (fortify conceptual learning, pre-train in procedural skills); (c) hands-on labs (fortify procedural/conceptual learning) in on-site bootcamps. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.