Collaborative Research: PPoSS: LARGE: Research into the Use and iNtegration of Data Movement Accelerators (RUN-DMX)

The project aims to optimize communication overheads for high-performance computing (HPC) applications to better address the challenges caused by the rapid growth of data. Many important scientific simulations have large data inputs or outputs that may be sparse and that may also require extra effort and energy to move across processors, memories, and disks within a large HPC system. Moreover, an HPC node may have several different locations where data needs to be moved to and from while an HPC application is running. This work’s novelty lies in its focus on optimizing communication overheads for HPC systems and applications by supporting “computation-in-communication”. The integration of these new hardware advancements with appropriate software techniques will enhance the scalability of computing for high-performance applications including molecular dynamics simulations and applications like computational fluid dynamics codes. The project's impacts include: (1) enhanced scalability of computing for high-performance applications via reductions in data movement, (2) novel algorithmic and hardware designs for the broader HPC community to leverage emerging technologies combining communication and computation, and (3) open-source software infrastructure that can be used to facilitate education in parallel computing, HPC, and computer architecture at the graduate and undergraduate levels. The project's technical goals encompass several key components. First, it develops new algorithms to effectively leverage computation-in-communication paradigms. Second, it incorporates compression techniques to enhance data transfer efficiency, including the development of new, processing-friendly compressed formats specifically designed for sparse data. Third, the project designs novel hardware enhancements to optimize computation-in-communication. The project creates a full-stack solution for computation-in-communication with an open-source library focused on algorithmic and compression techniques which are co-designed with architecture designs to support efficient processing and manipulation of large data inputs. Combined, these hardware and software advancements will allow a larger class of applications to take advantage of next-generation data-centric HPC that minimizes communication overheads and data movement. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.