SHF: Small: Explainable Machine Learning for Better Design of Very Large Scale Integrated Circuits

With the advance of chip technology, Computer-Aided Design of Integrated Circuits (IC-CAD) becomes more complex, challenging, and time-consuming. Recent years have seen a rising trend of artificial intelligence (AI) applied to different stages of chip design and manufacturing. The incorporation of AI has been shown to make the chip design process more efficient and reliable by providing early feedback to predict potential failures within the design cycle. The goal of this project is to utilize the emerging field of Explainable Artificial Intelligence (XAI) to transform the utility of AI within the chip design process. This project is immediately relevant to AI-assisted chip design by providing an important explainability dimension. Explainability provides an understanding of why a design is predicted to be failing and root-causing it. It also allows the designer to identify the best strategy to avoid the failure from occurring later in the design cycle. Explanations made with XAI have the potential to transform the traditional chip design process by providing effective and early feedback about AI-predicted failures, enhancing trustworthiness to AI predictions, and overall developing a novel paradigm for designers to collaborate with the IC-CAD tools. Research findings from this project will be of immediate interest to IC-CAD and chip design companies because of their promise to reduce time-to-market of electronic products and align well with the 2022 Semiconductor CHIPS Act. The project will provide research opportunities for top undergraduate students, primarily targeting women and minorities. The investigator will present research findings of this project to domestic semiconductor and IC-CAD companies to provide opportunities for internship, employment, and collaboration which directly contribute to workforce development and enhance competitiveness of the United States in the global semiconductor market. The tasks in the project cover a wide range of cases within the chip design flow including: (1) investigating how XAI can be used to avoid design rule violations on the chip layout early-on in the design cycle; (2) investigating how XAI can better guide optimizations related to synthesis of machine learning applications in hardware; (3) investigating the benefits of XAI for chip layout obfuscation against AI-based security attacks. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.