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NSFSMALL PROJECT

SHF: Small: A General-purpose Parallel and Heterogeneous Task Graph Computing System for VLSI CAD

Completed
Institution
University of Wisconsin-Madison, WI
Principal investigator
Tsung-Wei Huang
Funding
$403K
Duration
2023–2025
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Abstract

The ever-increasing design complexity in very-large-scale integration (VLSI) implementation will soon far exceed what many existing computer-aided design (CAD) tools can scale with reasonable design time and effort. A key fundamental challenge is that CAD must incorporate new parallel paradigms comprising many-core central processing units (CPUs) and graphics processing units (GPUs) to achieve transformational performance and productivity milestones. However, this goal is impossible to achieve without a novel computing system to tackle the implementation complexities of parallelizing CAD, such as irregular task parallelism, large CPU-GPU dependent tasks, dynamic control flow, and distributed computing, which cannot be expressed and executed efficiently with mainstream parallel computing systems. The project investigates a new computing system to advance the current state-of-the-art by assisting everyone to efficiently tackle the challenges of designing, implementing, and deploying parallel CAD algorithms on heterogeneous nodes. The proposed open-source software and education activities will facilitate technology transfers and enable diverse industry-academia collaborations in a multidisciplinary community. This project aims to streamline the building of parallel CAD tools on heterogeneous nodes by researching a novel computing system that consists of three major components: (1) a new parallel and heterogeneous task graph programming model that enables CAD developers to express end-to-end parallelism using minimal programming effort, (2) an efficient system runtime to support the programming model with high performance optimized across latency, energy efficiency, and throughput, and (3) new heterogeneous algorithms and frameworks to speed up time-consuming physical synthesis tasks and timing closure flow. Furthermore, the project is establishing new formulations and theory results for heterogeneous graph partitioning and task scheduling that are generalizable and scalable to arbitrary heterogeneous domains. Outcomes of the project are being made open-source to encourage a wide range of CAD researchers and developers to participate in and contribute to the project for sharing new findings, ideas, educational resources, and technology. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

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SMALL PROJECTDirectorate for Computer and Information Science and EngineeringSoftware & Hardware FoundationDES AUTO FOR MICRO & NANO SYSTREU SUPP-Res Exp for Ugrd Suppgraphparallelheterogeneouscomputingcadprocessing unitstaskparallelism

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