RTML: Large: Collaborative: Harmonizing Predictive Algorithms and Mixed-Signal/Precision Circuits via Computation-Data Access Exchange and Adaptive Dataflows
- Institution
- Georgia Tech Research Corporation, GA
- Principal investigator
- Yingyan C Lin
- Funding
- $585K
- Duration
- 2023–2025
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Abstract
Recent advances in machine learning are fueling a growing demand for intelligent Internet of Things (IoT), i.e., edge network applications. Many of them, such as autonomous vehicles, robots, and healthcare wearables, require real-time and in-situ learning to be perceived as truly intelligent. However, the limited computing and energy resources available at the edge device (e.g., mobile devices, sensors) stand at odds with the massive and growing cost of state-of-the-art machine learning training, posing a grand challenge for real-time machine learning (RTML) at the edge. This goal of this project is to foster a systematic breakthrough in achieving efficient online training of state-of-the-art machine learning algorithms in pervasive resource-constrained platforms and applications. An order of magnitude advance in RTML would enable numerous edge devices to proactively interpret and learn from new data, improve their own performance using what they have learned, and adapt to dynamic environments, all in real time. Success in this project will enable truly intelligent edge devices to penetrate all walks of life and thus generate significant impacts on societies and economies. This project will lead to new courses and open-education resources that can attract diverse groups of students and eventually deliver a platform for inclusion and innovation. The project addresses the RTML grand challenge using a three-pronged 'co-design' approach that seamlessly integrates algorithm, architecture, and circuit-level innovations. Specifically, at the algorithm level, an efficient training framework for RTML, for which trained models are also natively efficient for inference, will be established. Aggressive time and energy reductions can be achieved, at first by improving general training techniques, and then by focusing particularly on online learning and adaptation. At the architecture level, the project will first target reducing the high cost of data movement by trading it for lower-cost computation, and then generate optimal dataflows and hardware architectures to maximize the joint benefits of algorithms and hardware. At the circuit level, the project will leverage adaptive low-precision algorithms and architectures to design ultra-energy-efficient mixed-signal compute fabrics. Statistical computing techniques will be incorporated to demonstrate efficient, scalable, and robust machine learning chips. Finally, at the system level, an integration effort will be included to aid the realization of realistic system goals and to evaluate the innovations of the three core thrusts. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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