Collaborative Research: SHF: Medium: Memory-efficient Algorithm and Hardware Co-Design for Spike-based Edge Computing

In today's rapidly advancing world of Artificial Intelligence (AI), energy efficiency has emerged as a crucial factor to facilitate the ubiquitous development of intelligent systems. The efficient deployment of AI holds the key to overcoming limitations posed by power-constrained devices and contributes to sustainable technological progress. Neuromorphic computing offers a brain-inspired paradigm of AI, called Spiking Neural Networks (SNNs), that represents a promising step forward in sustainable AI development. Inspired by the brain's neural architecture, SNNs process information in sparse, asynchronous, and event-driven patterns, resulting in reduced power consumption. This project aims to integrate SNNs with modern integrated circuits propelling energy efficiency across various AI domains, such as object detection, autonomous driving and image classification. The project team aims to devise novel algorithms and hardware design with prototype chips to accelerate the performance of SNNs in low-power and memory-efficient systems. These spiking neural chips will enable the practical and immediate application of neuromorphic systems in areas like drones, autonomous robots, portable medical devices, and wearable smart assistants. Furthermore, the project embraces an algorithm-to-system approach, providing opportunities for high school, undergraduate, and graduate students to explore research in the field of neuromorphic computing. An essential focus of this project also lies in training the next generation of scientists and engineers, fostering diversity, and promoting inclusivity within the AI and semiconductor fields. This project tackles the crucial task of enabling deep learning and AI algorithms on edge computing devices that have strict memory and power constraints. The key innovation lies in leveraging a brain-inspired spiking neural network (SNN) approach for edge computing. The team addresses the memory overhead issue of spiking neurons and takes a foundational approach, optimizing algorithms and hardware design for SNN deployment on edge devices. The project proposes algorithmic solutions, including novel architectures with shared computations and compression strategies, such as quantization and early exit. These optimizations aim to enhance the efficiency of SNNs on resource-constrained edge devices. On the hardware front, the project plans to demonstrate these ideas through prototype chip tapeouts with SNN-specific dataflow, event-addressable computations, and configurable support for proposed algorithm features. The goal is to develop a comprehensive understanding of the power, performance, and accuracy tradeoffs of SNNs for edge computing applications that will pave the way for sustainable AI. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.