FuSe2 Topic 2: Heterogenous Integration of Wide-Bandgap Microelectronics and Power Electronics for Efficient Power Delivery to AI Processors in Data Centers

Nontechnical description: Data centers consume ~2% of the global electricity. However, the efficiency of power delivery in data centers is only 70~80%. This efficiency is largely limited by the resistive loss on the lateral power delivery board of the 48-to-1/0.8 V point-of-load (PoL) converter. This issue is particularly serious for AI processors as they are more power hungry than conventional CPUs. Vertical power delivery, which places the PoL converter directly underneath the AI processor, can shorten the power path and reduce the resistive loss by 10 times. However, this approach requires aggressive miniaturization of the PoL converter with 5~10 times frequency upscaling, the realization of which is limited by current power semiconductors. The goal of this project is to address fundamental knowledge gaps for realizing the 48 V vertical power delivery by heterogeneously integrating the wide-bandgap (WBG) microelectronics consisting of gallium nitride (GaN) power device, CMOS, and sensor, together with the PCB-integrated magnetics, power electronic circuitry, and advanced packaging. The intellectual merits of the project include establishing the knowledge base regarding the semiconductor materials, devices, magnetics, circuitry, and packaging under a co-design framework to enable the envisioned ultra-high-frequency, miniaturized PoL converters. Four industrial collaborators will form an advisory board to guide the team in research, education, and IP development. The broader impacts of the project include (1) enable tremendous energy savings in data centers, with an annual reduction in carbon emission equal to ~6.5 million passenger vehicles, (2) enhance U.S. competitiveness in WBG semiconductor manufacturing. In addition, this project will train future students in the fields of WBG semiconductors, microelectronics, and power electronics. Technical description: To improve the device performance for frequency upscaling, the project deploys a novel multi-channel GaN material architecture, which comprises 5~15 vertically-stacked two-dimensional hole gas (2DHG) and/or two-dimensional electron gas (2DEG) channels. The objective of the project is to address the fundamental knowledge gaps in multi-channel materials, power and CMOS devices, magnetics, circuitry, and packaging to enable the ultra-high-frequency, miniaturized PoL converters. The studies are guided by a multi-scale co-design framework that comprises a machine learning-aided material-device co-design and an electro-thermo-mechanical component-package-board co-design. This project will focus on research activities in the following five aspects: (1) The optimal doping schemes and fundamental transport properties of the WBG multi-channel material will be probed. (2) Novel device architectures, such as high-k gate stack and superjunction structures, will be integrated into the multi-channel power transistor and multi-channel CMOS for achieving high performance and monolithic integration. (3) A deep learning model trained by the experimental data augmented by physical simulation will be explored for material-device co-optimization. (4) Novel integrated magnetics and 48/0.8 V single-stage circuit topology will be developed. (5) Optimal package architectures and cooling approaches will be identified using a component-package-board co-design framework to achieve low power delivery impedance, high heat dissipation, and good reliability. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.