FET: Small: Low-Power Computing based on Programmable Multidimensional Circuits

Many currently unresolved combinatorial optimization problems can be mapped into large-scale Quadratic Unconstrained Binary Optimization (QUBO) problems. Solving these problems can lead to breakthroughs in various disciplines including medicine, finance, and engineering, among others. Unfortunately, traditional computing systems based on von Neumann architectures struggle to accurately solve QUBO problems involving more than a few tens of variables. This limitation has spurred academia and industry to seek alternative methods for addressing large-scale QUBO problems. Recently, this effort has driven considerable interest in analog computing systems known as Oscillator Ising Machines (OIMs). OIMs use oscillating physical devices as artificial binary spins and offer high parallelization during the computation. However, current OIMs consume significant power per spin, and their accuracy in solving QUBO problems decays sharply as the problem size grows, which is primarily due to amplitude heterogeneity (AH), a phenomenon that disrupts the dynamics of large analog spin networks. In practice, AH limits the ability of OIMs to find correct solutions for QUBO problems with more than hundred variables. This project will create “n-SPHERE” (multidimeNSional comPlementary metal-oxide-semiconductor HypERspin programmablE circuits), a new solver for combinatorial optimization problems manufacturable in CMOS technology. The project team will collaborate with the STEM education and workforce development program at Northeastern University to organize on-campus activities involving K-12 students, community colleges, and local schools, focusing on enhancing STEM engagement, particularly among underrepresented groups. This research will form a new foundation for analog computing by generating a chip-scale computing engine that successfully solves QUBO problems with thousands of variables while consuming power levels in the microwatt range. n-SPHERE will surpass previous OIMs by utilizing novel spin-network dynamics and advanced nonlinear circuit designs. It will prevent performance degradation due to AH by employing CMOS circuits that mimic the behavior of multidimensional hyperspins and by implementing a new annealing technique, called dimensional annealing, during the computation. When addressing QUBO problems with thousands of variables, n-SPHERE is expected to achieve a probability of success and time-to-solution two orders of magnitude better than current OIMs. In addition, n-SPHERE will consume over ten times less power per spin compared to the existing QUBO solvers. This capability will produce new computational resources for exploring and leveraging emerging phenomena in a variety of disciplines. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.