ENG-QUANT: Low-Power CryoCMOS Control for Superconducting Qubits with High-Frequency Readout

Quantum systems are gaining increasing interest in solving computationally challenging problems, enabling high-performance computing, advanced sensing, and secure communication. However, building a scalable quantum system with high fidelity faces a major challenge. Ultimately, millions of qubits are required to achieve practical quantum computing, and a significant challenge lies in their control electronics and interconnectivity. Current cryogenically cooled quantum computers are controlled from room temperature using coaxial cables, which poses a significant bottleneck for long-term scalability due to the limited cooling power of a typical refrigerator. This project aims to demonstrate an ultra-low-power cryogenic complementary metal-oxide-semiconductor (cryoCMOS) integrated architecture for controlling a novel superconducting qubit. This approach will enable scalable, low-power, low-latency control of superconducting qubits with high fidelity. In addition to the research, the education component of this interdisciplinary project addresses the increasing need of workforce development in several critical areas: integrated circuits, quantum engineering, and semiconductor manufacturing. The education plan includes integrating advanced research materials into courses, providing research opportunities for undergraduate and graduate students, advising student project teams, and conducting outreach efforts. In this project, the cryoCMOS architecture will be designed and developed to reduce the power consumption of qubit controllers without sacrificing its functionality. The proposed qubit controller replaces the conventional power-hungry digital-to-analog converter, which generates pulse shapes, with a custom-designed energy-efficient crossbar array. With this novel approach, the cryoCMOS chip can efficiently generate modulated signals required for high-fidelity quantum logical operations. In addition, the team will design a superconducting qubit architecture that reduces measurement errors, which are currently the dominant source of errors in qubit processing. To achieve higher readout and quantum non-demolition fidelity, the team will develop readout resonators with a large detuning from the transmon qubit while maintaining compatibility with standard microwave cabling. The project aims to first demonstrate single-qubit and two-qubit operations with state control and readout pulses generated with the cryoCMOS chip. With successful demonstration, the team will expand its collaborative efforts toward scalable quantum processors. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.