Collaborative Research: SaTC 2.0: RES: From Power Traces to Hybrid Quantum-Classical Exploits: Towards Trustworthy Distributed Quantum Computing Systems

Distributed quantum computing presents a paradigm shift in computational capabilities by enabling the execution of large quantum circuits across multiple quantum processors. While powerful, this approach creates new security risks: sensitive information can leak through physical signals such as power consumption, and the classical communication links that coordinate the processors can be manipulated by adversaries. These unaddressed vulnerabilities could expose sensitive data in sectors such as finance, healthcare, and national security. The project's novelties lie in its systematic investigation of power side-channel attacks and communication-layer exploits in distributed quantum computing systems, together with the development of quantum-aware defense mechanisms. The project's broader significance and importance are that it establishes foundational security principles for distributed quantum infrastructure, produces open-source tools and datasets for the research community, and trains the next generation of quantum security researchers and engineers. This project examines security in superconducting distributed quantum computing through three coordinated research thrusts. The research team develops a unified model for analyzing power side-channel information across distributed processors, accounting for circuit partitioning complexity and hardware heterogeneity, and characterizes how adversaries reconstruct circuit structure from aggregated power traces. The research team also analyzes vulnerabilities in the classical communication channels that synchronize distributed processors, studying active attacks such as error injection, and investigating how power traces can be exploited to infer classical communication contents indirectly, enabling cross-domain exploits. The proactive defenses developed in this project include a quantum-assisted anomaly detection pipeline that scores power traces against a learned normal baseline, a circuit partitioning mechanism to produce unpredictable subcircuit boundaries, and a noise-driven obfuscation strategy that varies hardware topology to disrupt adversarial power trace analysis. Techniques are validated through simulation, cloud-based quantum platforms, and industry-grade quantum hardware experiments. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.