Multi-Layer Optical Interconnects and Thermal Management for High-Density Chiplet-Based 3D Heterogeneous Integration

Artificial intelligence, advanced computing, and data-intensive applications require electronic systems that can move substantially larger amounts of data while removing more heat from increasingly compact hardware. Modern computing modules often combine many specialized chips, or “chiplets,” within a single package to improve performance and energy efficiency. However, existing packaging approaches increasingly constrain where chiplets can be placed because data connections, optical input/output, and cooling paths must follow restrictive physical layouts. As a result, system designers are often forced to make tradeoffs among bandwidth, thermal management, and chiplet placement. These constraints can increase interconnect power, reduce computing efficiency, limit integration density, and complicate the development of future high-performance systems. This research explores a combined optical-routing and thermal-management architecture that enables vertical light-based communication through stacked chip modules while providing scalable heat removal from multiple layers. By reducing constraints imposed by optical I/O and cooling access, the proposed approach enables chiplet placement to be driven more by dataflow and computing architecture than by physical routing and thermal limitations. The anticipated outcome is a more flexible hardware platform with improved energy efficiency, thermal reliability, and performance scalability for next-generation computing. The project supports national priorities in semiconductor technology, advanced packaging, photonics, and artificial intelligence hardware. Broader impacts include workforce-development activities for students at multiple levels, including semiconductor-focused workshops for middle-school students from underserved communities and efforts to strengthen pathways from community college programs into engineering bachelor’s degree programs at Michigan State University. The research investigates multi-layer optical interconnects and thermal-management technologies for high-density chiplet-based three-dimensional heterogeneous integration. The intellectual merit lies in advancing the fundamental understanding and practical realization of high-density hardware integration through the co-design of photonic interconnects, thermal management, microelectromechanical systems (MEMS), and heterogeneous packaging technologies. A central objective is the development of high-density vertical optical waveguides and optical input/output structures that support high-speed communication between stacked layers and external optical interfaces. These optical links will be characterized through measurements of loss, crosstalk, data rate, bit-error rate, alignment tolerance, and stability under thermal loading, while their potential impact on bandwidth efficiency at the module level will be assessed through representative system-level analyses. A second objective focuses on a scalable thermal-management architecture based on modular thermal-interface chiplets that provide low thermal resistance while mechanically decoupling chip stacks from shared cold plates. The resulting structures will be evaluated against established cooling approaches, including silicon microchannel and manifold-microchannel cooling, using metrics such as thermal resistance, heat-removal capability, pressure drop, thermo-mechanical stress, warpage, and reliability under representative power and thermal-cycling conditions. The effort culminates in a module-scale three-dimensional heterogeneous test vehicle that integrates and evaluates these optical and thermal technologies with embedded thermal and stress-monitoring structures. This platform will connect component-level advances to system-level measures of bandwidth efficiency, thermal performance, integration density, and reliability under realistic operating conditions. Decoupling chiplet placement from optical-routing and thermal-extraction constraints establishes a new framework for heterogeneous system design in which architecture and dataflow, rather than interconnect and cooling limitations, become the primary drivers of system organization. The resulting knowledge is expected to advance the foundations of next-generation high-performance and energy-efficient computing systems. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.