Electronic Confinement, Dielectric Perturbations, and Stability Mechanisms in Weyl Semimetals for Nanoscale Interconnects

Every smartphone, computer, data center, and artificial intelligence system depends on billions of microscopic wires that carry electrical signals between transistors. As these wires become increasingly smaller, they also become less efficient, wasting energy, generating heat, and slowing the performance of future electronic technologies. Overcoming this challenge has become one of the greatest barriers to continuing advances in computing, communications, and energy-efficient electronics. This project investigates an emerging class of quantum materials known as Weyl semimetals that may enable electrical signals to travel more efficiently when conventional metals begin to fail at extremely small dimensions. The research will determine whether these materials can provide a practical pathway toward faster, more energy-efficient computer chips by identifying the conditions under which they outperform today's interconnect materials. The resulting knowledge will help establish scientific design principles for future semiconductor technologies while strengthening United States leadership in advanced microelectronics and semiconductor manufacturing. The project will also provide interdisciplinary research training for undergraduate, graduate, and doctoral students in materials science, nanotechnology, and semiconductor engineering, while engaging K–12 students and the public through hands-on outreach activities that demonstrate how new materials drive future computing technologies. The technical objective is to establish a quantitative transport framework for tantalum phosphide and niobium phosphide interconnects under simultaneous thickness, linewidth, microstructure, and dielectric confinement. The research will fabricate thin films and patterned wire test structures using industry-compatible deposition, lithography, and dielectric integration methods, followed by temperature-dependent transport, magnetic-field-dependent transport, Hall measurements, microscopy, diffraction, and chemical analysis. Measured resistivity will be converted into line resistance, capacitance will be estimated from the surrounding dielectric geometry, and the resulting resistance-capacitance delay will be benchmarked against state-of-the-art copper, tungsten, and cobalt interconnect values. This comparison will directly connect material transport to the system-level metric that governs signal delay. Microstructure and dielectric environment will be treated as co-design variables rather than secondary processing details. Texture, grain size, and grain network connectivity will be controlled through substrate selection, deposition conditions, and post-deposition thermal processing, while dielectric layers will be used to quantify charge transfer and Fermi-level shifts that can strengthen or suppress surface-influenced conduction. A collaborative theory and simulation effort will develop microstructure-aware scaling models that describe how bulk conduction, surface-assisted conduction, grain-boundary scattering, and linewidth reduction combine in polycrystalline Weyl semimetal wires. The project will generate experimentally validated design rules identifying the material, interface, and microstructure conditions under which Weyl semimetals remain viable as nanoscale interconnects. Research activities will provide hands-on training in thin-film synthesis, nanofabrication, electron microscopy, transport characterization, and computational materials modeling, preparing students for careers in semiconductor research, manufacturing, and advanced microelectronics. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.