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NSFDirectorate for Computer and Information Science and Engineering

EAGER: Analog Circuit Emulation of Quantum Circuits for Deterministic State Evaluation and Quantum Result Verification

Active
Institution
Arizona State University, AZ
Principal investigator
Michel A Kinsy
Funding
$99K
Duration
2026–2027
Open portfolio

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Abstract

The way today's quantum computers report answers is fundamentally uncertain: each run yields a probability, and confirming a single result typically requires repeating the same calculation thousands of times. This makes quantum computing slow and costly to validate and limits its use in important applications such as drug discovery, secure communications, and large-scale optimization. This project addresses this challenge by pairing a quantum computation with a small electronic circuit that implements the same operation in a different physical form. The circuit produces a high-fidelity estimate of the result in a single measurement, enabling rapid, low-cost comparison with the quantum output. This approach provides a new path toward trustworthy quantum computing, reduces the need for repeated measurements, and supports the development of energy-efficient computing technologies and a workforce trained at the intersection of quantum science and electronics. This project develops an asymmetric verification framework based on the shared linear structure of quantum gate operations and analog signal processing. A compiled quantum circuit is executed in parallel on a quantum processor and on an analog emulator that represents amplitudes as voltages and gate operations as circuit transformations. The emulator produces a continuous, non-destructive representation of the resulting state, which is compared with the quantum output using a fidelity-based validation metric. The research team derives a cost model for this verification asymmetry, constructing a multi-qubit precision prototype implementing key quantum gates, developing a sub-circuit fingerprinting method for scalable validation, and benchmarking performance against cloud quantum hardware. Expected outcomes include an open-source analog gate library, validated performance metrics, and a new hardware-based approach to quantum result verification. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

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Directorate for Computer and Information Science and Engineering01002627DB NSF RESEARCH & RELATED ACTIVITSecure &Trustworthy Cyberspacecomputersproducesoptimizationcontinuousmeasurementcompiledlinearfoundationimpactsvoltages

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